In the processor market, with the excellent design and craftsmanship Intel has been playing the role of leader, but Intel did not complacent, has been not only the development of new processors.
Intel Xeon Phi is designed for HPC servers and supercomputers to create a super multi-core processors, recently, Intel today reveal more about the second generation, code-named Knights Landing super multi-core Xeon Phi coprocessor details are expected in the second half of this year core architecture, code-named Knights Landing launched the second generation of super multi-core Xeon Phi coprocessor.
Intel Xeon Phi
The launch of the first 3 Knights Landing super multi-core processor versions, including the provision of a standard type and paragraph (2) of ultra high-end server-level co-processor multi-core products. Are KNL Coprocessor processor, Host Processor processor and Host Processor with Integrated Fabric processor in three different versions, these three processor cores are over 60 or more, computing performance breakthrough 3 TFLOPS.
In the latest news, revealed the limits, 3 Knights Landing super multi-core processors which Host Processor and Host Processor with Integrated Fabric processor is designed to meet the needs of server elastic expansion, supports up to 384GB capacity on the memory capacity while, two power than standard type KNL Coprocessor processor obtains a more than 2 percent (25%) of the energy consumption improvement.
In the I / O, it also provides Host Processor with Integrated Fabric version supports integrated optical fiber interface, as Host Processor with KNL Coprocessor processors were using a fiber optic interface with PCle.
Section 2: Intel Xeon Phi change in memory
In addition to several aspects of processor cores, Intel also announced that the world’s leading providers of advanced semiconductor solutions, Micron cooperate in providing packaging solutions for the overlay memory generation Intel Xeon Phi (TM) processor, the memory solutions is that the two Companies in order to break through the barriers of long-term outcome of memory, which uses a basic DRAM and stacking technology, which has also been mixed Micron Memory Cube product.
The memory of sustained DDR4 memory bandwidth of up to 5 times, every bit of its energy consumption is only one-third of its area is only half occupied, Knights Landing superimposed high-performance package will speed logic and DRAM memory layers into a single optimized package, will set a new industry benchmark for performance and energy consumption.
Memory stack optimized reliability, availability and serviceability, which is a key factor in high-performance computing systems. Knights Landing, one of the first application of the system – the next generation of Cray XC supercomputer – on April 29 launched by NERSC.
Intel integrated multi-core (MIC) architecture coupled with Micron’s high-performance memory is a powerful combination, Intel and Micron’s advanced technology successfully grafted onto the processor memory system, the memory system is very rare and low power consumption large bandwidth combined.
Knights Landing processor expects the first equipped with business systems, will probably come out in the second half of 2015. Intel also said that there will also be more than 50 vendors launched equipped Knights Landing processors. In addition to the Knights Landing, Intel also announced the end of the year to go codenamed Knights Hill’s third-generation Core Xeon Phi supercomputer architecture blueprint, for the first time in a 10-nm process with the second generation of Omni-Path Architecture technology.